Trap charge capturing quick flashing storage array structure and operating method thereof
Title:
Trap charge capturing quick flashing storage array structure and operating method thereof
Application Number:
200610072809
Application Date:
2006/04/10
Announcement Date:
2006/10/18
Pub. Date:
Publication Number:
1848439
Announcement Number:
Grant Date:
Granted Pub. Date:
ApplicationType:
Invention
State/Country:
11[China|beijing]
IPC:
H01L 27/115, G11C 16/02
Applicant(s):
Tsinghua Univ.
Inventor(s):
Pan Liyang, Sun Lei, Zhu Jun
Key Words:
Trap charge capturing, quick flashing storage, array structure, operating method
Abstract:
The present invention relates to a trap charge captured type flash memory array structure and its operation method. Said invention adopts serial arrangement to arrange the serial memory array structure forming two-dimensional several repeated permutations on the substrate. Said structure includes a first selective transistor, several storage units and a second selective transistor, the transistors and storage units are serial-connected, the gate of storage unit is connected with word line, the gate of selective transistor is connected with selection line, and first end of said serial structure is connected with bit line, and its second end is connected with next adjacent bit line. Its operation method includes programming operation, erasion operation and fetch operation.
Claim:
Priority:
PCT:
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