Sensitive amplifier circuit for quickflashing memory |
Title： |
| Sensitive amplifier circuit for quickflashing memory |
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Application Number： |
200610011812 |
Application Date： |
2006/04/28 |
Announcement Date： |
2006/10/11 |
Pub. Date： |
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Publication Number： |
1845253 |
Announcement Number： |
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Grant Date： |
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Granted Pub. Date： |
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ApplicationType： |
Invention |
State/Country： |
11[China|beijing] |
IPC： |
G11C 11/419 |
Applicant(s)： |
Tsinghua University |
Inventor(s)： |
Yang Guangjun, Wu Dong, Pan Liyang, Zhu Jun |
Key Words： |
Sensitive amplifier circuit, quickflashing memory |
Abstract： |
A sensitive amplifier circuit used in high-speed storage belongs to high-speed storage design, and especially relates to the design of reading operating circuit in high-speed storage under a low main voltage. The invention is characterized in that the circuit adopts quarter-phase precharge circuit, selects NMOS pipes controlled by two synchronizing or asynchronous signals to comprise two precharge paths, and charges the NMOS spacer pipe endwall which restricts the precharge current to make the spacer pipe rapidly reach a maximum conducting state, which is good for precharging the bit line and can eliminate the precharge current bottleneck, therefore a faster precharge velocity can be reached. The invention also adopts self-interacting load circuit and two-stage clamp circuit, which can carry out the speed-read of the high-speed storage under a low main voltage and simultaneously can improve the noise immunocompetence of the system. |
Claim： |
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Priority： |
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PCT： |
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