Two-dimensional discrete cosine conversion/counter-conversion VLSI structure and method with no transposition part and separate line and column
Title:
Two-dimensional discrete cosine conversion/counter-conversion VLSI structure and method with no transposition part and separate line and column
Application Number:
00129798
Application Date:
2000/10/13
Announcement Date:
2001/03/28
Pub. Date:
Publication Number:
1289213
Announcement Number:
1142683
Grant Date:
Granted Pub. Date:
2004-3-17
ApplicationType:
Invention
State/Country:
11[China|beijing]
IPC:
G06F 17/10, H04N 7/30
Applicant(s):
Qinghua Univ.
Inventor(s):
Hu Yun, Gong Danian
Key Words:
Two-dimensional discrete cosine, conversion/counter-conversion VLSI structure, no transposition part
Abstract:
The present invention relates to the field of image coding and image processing technology. It includes input data regulation unit, output data regulation unit, DCT coefficient generation unit, address generation unit, processor array and controller. The processor array is formed from N identical processor units, in which the input memory is connected with external memory, DCT coefficient generation unit is connected with processor array, said processor array is connected with output data regulation unit, and the output data regulation unit is connected with external memory, and the above-mentioned all units and the address generalum unit are connected with controller. Said inventioin does not increase arithmetic unit, at the same time can remove transpose component and reduce complexity of hardware.
Claim:
Priority:
PCT:
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