Synchronus scanning enable-condition prechargig CMOS trigger |
Title: |
Synchronus scanning enable-condition prechargig CMOS trigger |
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Application Number: |
200510011999 |
Application Date: |
2005/06/24 |
Announcement Date: |
2005/12/21 |
Pub. Date: |
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Publication Number: |
1710811 |
Announcement Number: |
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Grant Date: |
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Granted Pub. Date: |
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ApplicationType: |
Invention |
State/Country: |
11[China|beijing] |
IPC: |
H03K 3/012, H03K 3/037, H03K 3/356 |
Applicant(s): |
Tsinghua Univ. |
Inventor(s): |
Cao Yuting, Qiao Fei, Wang Hui, Yang Huazhong |
Key Words: |
Synchronus scanning, enable-condition prechargig, CMOS trigger |
Abstract: |
Based on existing trigger with conditional preshoot structure driven by clock signal in low voltage swing, the invention makes following modifications: reducing a additional high voltage power supply in structure of simplified flip-latch in first stage; using two pieces of independent phase latch with same circuit parameters in single clock to form latch in second stage in order to ensure symmetrical output waveform; adding a scan and control circuit of having functions of enable control and scanning test. The invention also disclosed two CMOS triggers with modified structure: single end output, and synchronous reset. Under same testing condition, the invention saves more than 30£¥ power consumption, smaller circuit area and improved delay performance of circuit. |
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