CMOS symmetrical output D flip-latch with self-correction function |
Title: |
CMOS symmetrical output D flip-latch with self-correction function |
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Application Number: |
200610114285 |
Application Date: |
2006/11/03 |
Announcement Date: |
2007/04/25 |
Pub. Date: |
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Publication Number: |
1953326 |
Announcement Number: |
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Grant Date: |
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Granted Pub. Date: |
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ApplicationType: |
Invention |
State/Country: |
11[China|beijing] |
IPC: |
H03K 3/012, H03K 3/356 |
Applicant(s): |
Tsinghua University |
Inventor(s): |
Lin Saihua, Yang Huazhong, Wang Hui |
Key Words: |
self-correction, CMOS, symmetrical output, D flip-latch |
Abstract: |
The invention relates to a symmetry output register, which is characterized in that the discharge or charge branch with changed state has only two transistors; since the CLK and D signals have one in stable state when another one turnovers, therefore, it has only one transistor in control state when state changes, to accelerate the turnover speed, with better symmetry. Since it has abundant circuit, when two circuits in hold states, it can automatically recover the soft error caused by radios. |
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Priority: |
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PCT: |
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