Method for constructing two-stage sweep test structure with low test power dissipation |
Title: |
Method for constructing two-stage sweep test structure with low test power dissipation |
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Application Number: |
200410088881 |
Application Date: |
2004/11/08 |
Announcement Date: |
2005/04/06 |
Pub. Date: |
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Publication Number: |
1603853 |
Announcement Number: |
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Grant Date: |
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Granted Pub. Date: |
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ApplicationType: |
Invention |
State/Country: |
11[China|beijing] |
IPC: |
G01R 31/28, G01R 31/317, G01R 31/3185, G06F 11/22 |
Applicant(s): |
Tsinghua University |
Inventor(s): |
Xiang Dong, Sun Jiaguang, Li Kaiwei |
Key Words: |
constructing method, two-stage, sweep test structure, low test power dissipation |
Abstract: |
It is a method to form a two-step scanner structure with low power consumption and belongs to integration circuit measurement technique field. The method is characterized by the following: first to get a form judging whether there is common composition relay between any two time sequences from circuit net single file; to classify the units into groups according to the form; to alter all the time sequence units into scanning time sequence unit; to select one scanning sequence unit from each group to form a scanning chain connected to the time signal clk#-[1] and the rest scanning time sequence units is classified into small groups connected to the time signal clk#-[2] . |
Claim: |
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Priority: |
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PCT: |
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