Full complementary MOS exhaustion region condenser network aimed at low voltage application
Title:
Full complementary MOS exhaustion region condenser network aimed at low voltage application
Application Number:
200710118648
Application Date:
2007/07/11
Announcement Date:
2008/01/02
Pub. Date:
Publication Number:
101098137
Announcement Number:
Grant Date:
Granted Pub. Date:
ApplicationType:
Invention
State/Country:
11[China|beijing]
IPC:
H03K 17/687H01L 27/092H01L 23/522
Applicant(s):
Tsinghua University
Inventor(s):
Sun Yihe, Yin Shujuan
Key Words:
Full complementary, MOS, condenser network, low voltage
Abstract:
The invention discloses a full-compensation MOS exhaustion capacitor circuit with low-voltage application, belonging to full-digit capacitor design technical field in integrated circuit, wherein the capactiro circuit is substantially composed of five PMOS tubes M1-M5, and one NOMOS tube M6. The invention realizes the full-compensation MOS exhaustion capacitor with high linearity and low-temperature correlation at low voltage in deep sub micrometer design, while the full-digit design can reduce design cost. The invention can realize switch capacitor via full-digit technique without additional cost, at low voltage of deep sub micrometer technique.
Claim:
Priority:
PCT:
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