Quick head calibration for IP package head in programmable chips and head calibration module therefor
Title：
Quick head calibration for IP package head in programmable chips and head calibration module therefor
Application Number：
 02117629
Application Date：
 2002/05/10
Announcement Date：
 2003/11/19
Pub. Date：
Publication Number：
 1457179
Announcement Number：
 1191697
Grant Date：
 2005-3-2
Granted Pub. Date：
 2005-3-2
ApplicationType：
 Invention
State/Country：
 11[China|beijing]
IPC：
 H04L 12/54, H04L 12/26
Applicant(s)：
 Tsinghua Univ.
Inventor(s)：
 Liu Bin, Li Xudong
Key Words：
 Quick head calibration,IP package head, programmable chips, head calibration module
Abstract：
 First, for five data periods in IP package head, the 'sum' of adding two 16 bits tuples in each data period is obtained. If there is a carry with one bit, then the carry is added into the low order bit of the 'sum' to obtain the new 'sum'. Next, the five such 'sum' from five data periods is added between two by using method of pipeline to obtain the check sum. If the check sum is equal to 'FFFF', then the check is passed. The character of the head check module is its data dleay channel and pipeline head check channel. The pipeline head check channel is composed of the 17 bits adder with the carry and the kernel pipeline connected in serial. The kernel pipeline fulfills the adding task. It is validated that the chip Xcv600E-6 cam complete the fast operation of head check.
Claim：
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PCT：
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