Flow related control information cache memory based on network processor |
Title： |
| Flow related control information cache memory based on network processor |
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Application Number： |
200610011424 |
Application Date： |
2006/03/03 |
Announcement Date： |
2006/08/02 |
Pub. Date： |
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Publication Number： |
1812378 |
Announcement Number： |
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Grant Date： |
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Granted Pub. Date： |
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ApplicationType： |
Invention |
State/Country： |
11[China|beijing] |
IPC： |
H04L 12/56 |
Applicant(s)： |
Tsinghua Univ. |
Inventor(s)： |
Liu Zhen, Liu Bin |
Key Words： |
Flow related control information cache memory, network processor |
Abstract： |
This invention is flow correlated controlling high-speed information buffer memory based on network processor. The address space is divided into blocks with the same size. Each flow correlates to a block, which is used for saving controlling information of the flow Flow-Cache arranges two work stacks named Bank A and Bank B. the buffer data in the work stack is also organized into blocks when processing element is using the flow correlated controlling information in one work stack to process, the other work stack reads-in related flow correlated controlling information to the next data packet through the prefetched address which is provided by flow classifier if the flow correlated controlling information is modified by processing element, when replacement takes place, the modified part should be written back to controlling information memory. |
Claim： |
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Priority： |
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PCT： |
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LegalStatus： |
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