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Method for reducing power consumption of memory in integrated circuit
Title：	Method for reducing power consumption of memory in integrated circuit
Application Number：	200610057124	Application Date：	2006/03/10
Announcement Date：	2006/08/02	Pub. Date：
Publication Number：	1811978	Announcement Number：
Grant Date：		Granted Pub. Date：
ApplicationType：	Invention	State/Country：	11[China|beijing]
IPC：	G11C 7/00
Applicant(s)：	Tsinghua Univ.
Inventor(s)：	Yang Huazhong, Sui Hong, Wang Yu, Luo Rong, Wang Hui
Key Words：	reducing power consumption, memory in integrated circuit
Abstract：	This invention relates to a method for reducing power loss of storages in IC, which first of all finds out the low power loss state of the storage units in a storage, a coder compares the proportion of the low and high power loss state contents in the originals stored content to apply a code method based on said proportion to code the original stored content, the storage stores the output content of the coder, a decoder reads the content of the storage and decodes and outputs the original stored contents.
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