Prepn process of nanometer silicon line array
Title：
Prepn process of nanometer silicon line array
Application Number：
 200610089728
Application Date：
 2006/07/14
Announcement Date：
 2007/01/03
Pub. Date：
Publication Number：
 1887687
Announcement Number：
Grant Date：
Granted Pub. Date：
ApplicationType：
 Invention
State/Country：
 11[China|beijing]
IPC：
 B82B 1/00
Applicant(s)：
 Tsinghua Univ.
Inventor(s)：
 Huang Zhipeng, Zhu Jing
Key Words：
 Prepn process, nanometer silicon line, array
Abstract：
 The present invention is preparation process of nanometer silicon line array, and belongs to the field of nanometer material preparing technology. The preparation process includes the following steps: washing silicon chip successively with acetone, alcohol, acid cleaning solution and No. 1 standard washing solution; dropping 0.01-0.9 wt% concentration polyethylene pellet solution to the surface of silicon chip and drying in the air; etching the silicon chip with reaction ion in oxygen atmosphere for 1-2 min, maintaining at 90-110 deg.c for 1-6 min, depositing 25-50 nm thick Ag film with vacuum deposition instrument; and soaking the deposited sample inside the etching solution of hydrofluoric acid and hydrogen peroxide for 4-30 min. The preparation process can prepare great area ordered arranged nanometer silicon line array, and is simple, low in cost and suitable for large scale production.
Claim：
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