Automatic wiring method of analog integrated circuit based on multiple step length labyrinth algorithm |
Title: |
Automatic wiring method of analog integrated circuit based on multiple step length labyrinth algorithm |
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Application Number: |
200610164921 |
Application Date: |
2006/12/08 |
Announcement Date: |
2007/05/16 |
Pub. Date: |
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Publication Number: |
1963827 |
Announcement Number: |
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Grant Date: |
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Granted Pub. Date: |
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ApplicationType: |
Invention |
State/Country: |
11[China|beijing] |
IPC: |
G06F 17/50 |
Applicant(s): |
Tsinghua University |
Inventor(s): |
Hong Xianlong, Cai Yici, Du Changxu |
Key Words: |
multiple step length labyrinth algorithm, analog integrated circuit, automatic wiring |
Abstract: |
This invention belongs to VLSI physical design technique field and relates to one computer aid design method facing analogue circuit board graph, which is characterized by the following: totally according to analogue integration circuit multi-line wide binding for design to satisfy analogue circuit load current status complexity requirement. This invention comprises shortest path index method with multiple line width binding conditions and adopts starting index method to realize automatic line distribution process on network mode. |
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PCT: |
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