Digital phase-locking method
Title:
Digital phase-locking method
Application Number:
01131095
Application Date:
2001/09/21
Announcement Date:
2002/02/27
Pub. Date:
2003/12/17
Publication Number:
1337802
Announcement Number:
1131619
Grant Date:
Granted Pub. Date:
2003-12-17
ApplicationType:
Invention
State/Country:
11[China|beijing]
IPC:
H04L 7/02
Applicant(s):
Qinghua Univ.
Inventor(s):
Pang Hao, Wang Zanji, Chen Jianye
Key Words:
Digital, phase-locking method
Abstract:
The digital phase-locking method incldues the following steps: firstly, making digital phase discrimination of inputted locked signal to obtain phase error signal, making high-frequency modulatino pretreatment of said signal to obtain phase error signal, making high-frequency modulation pretreatment of said signal to obtain forward-backward pulse signal, then making the control pulse being in the formed-backward pulse signal undergo the process of proportional pulse frequency division to obtain proportional forward-backward pulse signal, making proportional forward-backward counting operation to obtain parameter NF', latching parameter NP' before it is cleared, outputting to obtain proportional control parameter NP, at the same time making the control pulse being in forward-backward pulse signal undergo the process is integral pulse frequency division to obtain integral forward-backward pulse signal, mkaing integral forward-backward counting operation to optain integral control parameter NI, adding parameter NP and NI, and utilizing amplitude control to obtain parameter N, under the control of it, making digital control frequency synthesis of clock signal to obtain synchronous double-frequency signal.
Claim:
Priority:
PCT:
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