Rectangular steiner tree method of super large size integrated circuit avoiding barrier
Title:
Rectangular steiner tree method of super large size integrated circuit avoiding barrier
Application Number:
200410069118
Application Date:
2004/07/06
Announcement Date:
2005/03/02
Pub. Date:
2007/03/14
Publication Number:
1588381
Announcement Number:
1304996
Grant Date:
2007-3-14
Granted Pub. Date:
2007-3-14
ApplicationType:
Invention
State/Country:
11[China|beijing]
IPC:
G06F 17/50
Applicant(s):
Tsinghua Univ.
Inventor(s):
Hong Xianlong, Jing Tong, Hu Yu
Key Words:
Rectangular steiner tree method, super large size, integrated circuit, avoid, barrier
Abstract:
The obstacle avoiding rectangular Steiner tree method for very large scale integrated circuit (VLSI) design belongs to the field of computer-aided VLSI design technology, and is especially VLSI wiring design. The present invention features the first application of full Steiner tree (FST) end point separating method, subsequent construction of son Steiner tree by means of ant swarm method and voracious FST method for different son sets, and final connection of all the son Steiner trees in detour method. The said algorithm can process multiple end point wire mesh; can process complex obstacles and can process large scale issue in relatively short time. The present invention realizes obstacle avoiding rectangular Steiner tree constructing method with optimized wire length and time efficiency in VLSI wiring design.
Claim:
Priority:
PCT:
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