Integer transformation circuit and integer transformation method |
Title: |
Integer transformation circuit and integer transformation method |
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Application Number: |
200510130986 |
Application Date: |
2005/12/15 |
Announcement Date: |
2006/07/12 |
Pub. Date: |
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Publication Number: |
1801940 |
Announcement Number: |
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Grant Date: |
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Granted Pub. Date: |
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ApplicationType: |
Invention |
State/Country: |
11[China|beijing] |
IPC: |
H04N 7/30 |
Applicant(s): |
Tsinghua University |
Inventor(s): |
He Yun, Li Yu |
Key Words: |
Integer transformation circuit, integer transformation method |
Abstract: |
Present invention provides a integer conversion. It contains plurality of two-port two dimensional memory unit parallel two dimensional memory which is capable of parallelly inputted new line/column data after re-arranging originality matrices data and parallelly outputting new matrices line/column data, conversion arithmetical unit including one or more of one or more conversion and/or operation unit proceeding line and column conversion, and control unit providing address signal and read write control signal to said parallelly two dimensional memory according to coding decoding messages. |
Claim: |
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Priority: |
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PCT: |
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LegalStatus: |
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