Structure-irrelevant micro-processor verification and evaluation method
Title:
Structure-irrelevant micro-processor verification and evaluation method
Application Number:
200510011569
Application Date:
2005/04/15
Announcement Date:
2005/09/14
Pub. Date:
2007/11/07
Publication Number:
1667589
Announcement Number:
100347683
Grant Date:
2007-11-7
Granted Pub. Date:
2007-11-7
ApplicationType:
Invention
State/Country:
11[China|beijing]
IPC:
G06F 11/36
Applicant(s):
Tsinghua University
Inventor(s):
Zhang Youhui, Gu Yu, Li Peng, Wang Dongsheng, Wang Qi, Guo Songliu
Key Words:
Structure-irrelevant, micro-processor, verification, evaluation
Abstract:
This invention relates to a checking and evaluating method about structure independency micro processing unit (abbreviation THUMPSim), which belongs to the micro processing unit chip checking and evaluating technique field. It is a micro processing unit simulative and checking method which is independent of system structure describing the simulative micro processing unit by facing part structure independency system structure defined method and processing simulated drive by event driven signal renewal arithmetic.
Claim:
Priority:
PCT:
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  Selected patents owned by Tsinghua University filed in 2005 are loaded.
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